Semiconductor wafer with improved flatness, and process for producing the semiconductor wafer

US6583050B2 · kind B2 · utility

Assignee

• Wacker Siltronic Gesellschaft F{dot over (u)}r Halbleitermaterialien AG · DE

Inventors

• Guido Wenski · Burghausen, DE
• Thomas Altmann · Burghausen, DE
• Ernst Feuchtinger · Wittibreut, DE
• Willibald Bernwinkler · Anzenkirchen, DE
• Wolfgang Winkler · Dresden, DE
• Gerhard Heier · Burghausen, DE

Key dates

• Filing date: Aug 13, 2002
• Grant date: Jun 24, 2003
• Expiry date: Aug 13, 2022

Classification

• Technology area (CPC B): Performing Operations; Transporting
• CPC primary: B24B37/08
• WIPO field: Machine tools
• WIPO sector: Mechanical engineering

Abstract

A semiconductor wafer has a front surface and a back surface and flatness values based on partial areas of a surface grid on the front surface of the semiconductor wafer, which has a maximum local flatness value SFQRmax of less than or equal to 0.13 &mgr;m and individual SFQR values which in a peripheral area of the semiconductor wafer do not differ significantly from those in a central area of the semiconductor wafer. There is also a process for producing this semiconductor wafer, wherein the starting thickness of the semiconductor wafer is 20 to 200 &mgr;m greater than the thickness of the carrier and the semiconductor wafer is polished until the end thickness of the semiconductor wafer is 2 to 20 &mgr;m greater than the thickness of the carrier.