Vertical DRAM having metallic node conductor

US6583462B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Toshiharu Furukawa · South Burlington, US
• Rajarao Jammy · Hopewell Junction, US
• Thomas S. Kanarsky · Hopewell Junction, US
• Jeffrey J. Welser · Stamford, US
• David V. Horak · South Burlington, US
• Steven J. Holmes · Colchester, US
• Mark C. Hakey · Saint Albans, US

Key dates

• Filing date: Oct 31, 2000
• Grant date: Jun 24, 2003
• Expiry date: Oct 31, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/0385

Abstract

A dynamic random access memory device formed in a substrate having a trench. The trench has a side wall, a top, a lower portion, and a circumference. The device includes a signal storage node including a metallic storage node conductor formed in the lower portion of the trench and isolated from the side wall by a node dielectric and a collar oxide above the node dielectric. Preferably, the trench has an aspect ratio of greater than 50. A buried strap is coupled to the storage node conductor and contacts a portion of the side wall of the trench above the collar oxide. A trench-top dielectric which is formed upon the buried strap has a trench-top dielectric thickness. A signal transfer device includes a first diffusion region extending into the substrate adjacent the portion of the trench side wall contacted by the buried strap, a gate insulator having a gate insulator thickness formed on the trench side wall above the first buried strap, wherein the gate insulator thickness is less than the trench-top dielectric thickness, and a gate conductor formed within the trench upon the trench-top dielectric and adjacent the gate insulator.