Memory device which samples data after an amount of time transpires
US6584037B2 · kind B2 · utility
119Cited by
92References
45Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2002 |
| Grant date | Jun 24, 2003 |
| Priority date | — |
| Expiry date | Feb 4, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operation of a synchronous memory device. The memory device includes an array of dynamic random access memory cells. The method of operation of the memory device includes receiving an external clock signal, and sampling a first operation code synchronously with respect to the external clock signal, the first operation code specifying a write operation. Additionally, the method of operation of the memory device includes sampling data after a number of clock cycles of the external clock signal transpire. The data is sampled in response to the first operation code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.