Process for forming microelectronic packages and intermediate structures formed therewith
US6586836B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2000 |
| Grant date | Jul 1, 2003 |
| Priority date | — |
| Expiry date | Mar 1, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating microelectronic dice by providing or forming a first encapsulated die assembly and a second encapsulated die assembly. Each of the encapsulated die assemblies includes at least one microelectronic die disposed in an encapsulation material. Each of the encapsulated die assemblies has an active surface and a back surface. The encapsulated die assemblies are attached together in a back surface-to-back surface arrangement. Build-up layers are then formed on the active surfaces of the first and second encapsulated assemblies, preferably, simultaneously. Thereafter, the microelectronic dice are singulated, if required, and the microelectronic dice of the first encapsulated die assembly are separated from the microelectronic dice of the second encapsulated die assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.