Fabricating a thin film transistor having better punch through resistance and hot carrier effects
US6589828B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 18, 2000 |
| Grant date | Jul 8, 2003 |
| Priority date | — |
| Expiry date | Dec 18, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
Fabricating thin film transistors. A gate electrode is formed on a substrate. A gate oxide film is then formed on the gate electrode. A polysilicon layer is deposited on the gate oxide film. An impurity ion is implanted into the polysilicon layer to control a threshold voltage of the polysilicon layer. A mask is formed on the polysilicon layer above the gate electrode, having the same width as the gate electrode. A second impurity ion is implanted into the exposed portion of the polysilicon layer using the mask, to form a lightly doped offset region on a drain region. The mask is removed. A second mask is formed on the polysilicon layer so as to cover a portion of the gate electrode and the light doped offset region. A Third impurity ion is implanted into the polysilicon layer using the second mask to form source/drain regions. The mask is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.