Compact stacked electronic package
US6590159B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2001 |
| Grant date | Jul 8, 2003 |
| Priority date | — |
| Expiry date | Feb 5, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K7/023
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides an electronic package for high speed, high performance semiconductors. It includes a plurality of devices, circuit members and short interconnections between the circuit members for maintaining high electrical performance. Suitable applications requiring high speed, impedance-controlled transmission line buses throughout the entire package include microprocessor and digital signal processor data buses, and high speed memory buses for products such as laptop and handheld computing and telecommunications devices. Circuit members include printed circuit boards and circuit modules, and may be formed from a wide variety of materials with unpacked or packed semiconductors attached directly to the circuit members. Through the use of clamps the package is at least factory reworkable and can be field separable. Thermal management structures may be included to maintain the high density devices within a reliable range of operating temperatures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.