Level shifting circuit and method
US6590420B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2001 |
| Grant date | Jul 8, 2003 |
| Priority date | — |
| Expiry date | Dec 20, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/302
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for shifting a signal from a first voltage level referenced to a first voltage reference, to a second voltage level referenced to a second voltage reference, while reducing the gate to source voltages on the output transistors. In one embodiment, the circuit includes six switches. A first switch receives the signal; a second switch receives an inverted representation of the signal; a third switch receives the output of the first switch; a fourth switch receives the output of the second switch; a fifth switch, referenced to the second voltage reference, has an input coupled with the output of the first switch and a control coupled with the output of the fourth switch; and a sixth switch, referenced to the second voltage reference, has an input coupled with the output of the second switch and has a control coupled with the output of the third switch. In one embodiment, when the third switch and the fourth switch are on, the signal is shifted to the second voltage level measured between the input of the fifth switch and the second voltage reference. The third and fourth switches act to prevent the gate to source voltage on the fifth and sixth switches from reaching a high vo…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.