Inventor · Colorado Springs, CO, US

Ryan T. Hirose

39Patents
14h-index
22Co-inventors
81Inventor score

Filing activity: Aug 11, 1989 → Nov 8, 2017

Most-cited inventions

PatentTitleAreaCited byStatus
US6163048A Semiconductor non-volatile memory device having a NAND cell structure Physics 360 Expired
US5789776A Single poly memory cell and array Electricity 229 Expired
US6614070B1 Semiconductor non-volatile memory device having a NAND cell structure Physics 99 Expired
US7545694B2 Sense amplifier with leakage testing and read debug capability Physics 89 Active
US6363011B1 Semiconductor non-volatile latch device including non-volatile elements Physics 64 Expired
US5644533A Flash memory system, and methods of constructing and utilizing same Electricity 62 Expired
US5892712A Semiconductor non-volatile latch device including embedded non-volatile elements Physics 52 Expired
US5774400A Structure and method to prevent over erasure of nonvolatile memory transistors Physics 46 Expired
US6122191A Semiconductor non-volatile device including embedded non-volatile elements Physics 41 Expired
US5506816A Memory cell array having compact word line arrangement Physics 38 Expired
US5656837A Flash memory system, and methods of constructing and utilizing same Electricity 35 Expired
US5760644A Integrated circuit timer function using natural decay of charge stored in a dielectric Physics 30 Expired
US5013943A Single ended sense amplifier with improved data recall for variable bit line current Physics 25 Expired
US5510638A Field shield isolated EPROM Electricity 24 Expired
US7969804B1 Memory architecture having a reference current generator that provides two reference currents Physics 14 Active
US6272029A Dynamic regulation scheme for high speed charge pumps Physics 13 Expired
US6178138A Asynchronously addressable clocked memory device and method of operating same Physics 12 Expired
US6590420B1 Level shifting circuit and method Electricity 10 Expired
US8125835B2 Memory architecture having two independently controlled voltage pumps Physics 9 Active
US8542541B2 Memory architecture having two independently controlled voltage pumps Physics 8 Active
US8570809B2 Flash memory devices and systems Electricity 8 Active
US8675405B1 Method to reduce program disturbs in non-volatile memory cells Physics 8 Active
US7821866B1 Low impedance column multiplexer circuit and method Physics 7 Active
US7471135B2 Multiplexer circuit Electricity 5 Active
US6654309B1 Circuit and method for reducing voltage stress in a memory decoder Physics 5 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.