Integrated circuit with multiple gate dielectric structures

US6597046B1 · kind B1 · utility

Assignee

• Intel Corporation · US

Inventors

• Robert S. Chau · Beaverton, US
• Reza Arghavani · Scotts Valley, US
• Bruce Beattie · Portland, US

Key dates

• Filing date: Aug 20, 1999
• Grant date: Jul 22, 2003
• Expiry date: Aug 20, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0144

Abstract

An integrated circuit includes insulated gate field effect transistors (IGFETs), having gate dielectric layers wherein a nitrogen concentration in the gate dielectric varies between a first concentration at the gate electrode/gate dielectric interface and a second concentration at the gate dielectric/substrate interface. In one embodiment the gate dielectric is an oxynitride formed by an N2 plasma; and the oxynitride has top surface nitrogen concentration that is higher than a bottom surface nitrogen concentration. In a further aspect of the present invention, an integrated circuit includes a plurality of IGFETs, wherein various ones of the plurality of IGFETs have different gate dielectric thicknesses and compositions. A method of forming IGFETs with different gate dielectric thicknesses and compositions, on a single integrated circuit, includes forming a first oxynitride layer, forming a masking layer, removing a portion of the first oxynitride layer, forming an oxide layer where the oxynitride was removed, and forming a plurality of gate electrodes, a first portion of the gate electrodes overlying the first oxynitride layer.