Circuit arrangement for scalable output drivers

US6597200B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Michael W. Pfeiffer · Richfield, US
• Andreas Täuber · Unterschleißheim, DE

Key dates

• Filing date: Mar 18, 2002
• Grant date: Jul 22, 2003
• Expiry date: Mar 18, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/83

Abstract

The invention provides a circuit arrangement for scalable output drivers, symmetrically arranged driver transistor groups being provided which each have transistor pairs having the same transistor line width. If there are m different driver transistor groups present, 2(n−1) different gradations result, thereby achieving good scalability. Furthermore, a transistor line width that is simple to design is provided for all transistors of all driver transistor groups, thereby providingidentical electrical properties with respect to an output terminal unit.