Analog method and circuit for monitoring digital events performance
US6600328B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 22, 2001 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | Sep 14, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R23/09
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An analog performance monitoring method and circuit arrangement are adapted to count a plurality of digital event pulses. Each digital event pulse controls a switching circuit to pass a substantially fixed amount of charge from a power supply. The charge is accumulated in a capacitor. In one example embodiment, the switching circuit is a transistor biased by the capacitor voltage to operate in a constant current region. The capacitor has a capacity to accumulate charge added from at least 100,000 digital event pulses maintaining bias of transistor operation in the constant current region. A comparator circuit monitors capacitor charge and signals when a quantity of events adding charge to the capacitor reaches a selectable threshold. In another example embodiment, a programmable voltage divider provides a controllable threshold. A reset circuit discharges the capacitor to an approximate ground level. Sampling is used to estimate a population of digital event pulses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.