Method and apparatus for implementing microprocessor control logic using dynamic programmable logic arrays
US6600959B1 · kind B1 · utility
6Cited by
29References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2000 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | Feb 4, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for using dynamic programmable logic arrays in microprocessor control logic provide decreased power and increased clock frequencies for data processing systems, by using programmable logic arrays exclusively for the control logic. The method and apparatus further simplify the design of the control logic and closure of timing within the microprocessor, by providing overlap of control logic evaluations and data transfers within the microprocessor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.