Methods of fabricating gallium nitride microelectronic layers on silicon layers
US6602764B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2001 |
| Grant date | Aug 5, 2003 |
| Priority date | — |
| Expiry date | May 7, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02664
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A gallium nitride microelectronic layer is fabricated by converting a surface of a (111) silicon layer to 3C-silicon carbide. A layer of 3C-silicon carbide is then epitaxially grown on the converted surface of the (111) silicon layer. A layer of 2H-gallium nitride then is grown on the epitaxially grown layer of 3C-silicon carbide. The layer of 2H-gallium nitride then is laterally grown to produce the gallium nitride microelectronic layer. The silicon layer is a (111) silicon substrate, the surface of which is converted to 3C-silicon carbide, or the (111) silicon layer is part of a Separation by IMplanted OXygen (SIMOX) silicon substrate which includes a layer of implanted oxygen that defines the (111) layer on the (111) silicon substrate, or the (111) silicon layer is a portion of a Silicon-On-Insulator (SOI) substrate in which a (111) silicon layer is bonded to a substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.