One-step process for forming titanium silicide layer on polysilicon
US6602786B2 · kind B2 · utility
1Cited by
5References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 21, 2002 |
| Grant date | Aug 5, 2003 |
| Priority date | — |
| Expiry date | Feb 21, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/663
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A single rapid thermal anneal (RTA) process is used to form a low resistivity titanium silicide layer atop a polysilicon gate layer for a MOSgated device. The process employs an amorphous silicon layer formed atop the polysilicon layer, followed by forming a titanium layer atop the amorphous silicon. A single RTA process at a temperature below the temperature of contamination diffusion is carried out, preferably at about 650° C. for 30 seconds. The top of the annealed titanium silicide layer is then stripped, and the remaining layer has a sheet Rho of less than about 2 ohms per square.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.