Process for fabricating an interconnect for contact holes

US6602788B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Axel Bürke · Dresden, DE
• Jens Hahn · Dresden, DE
• Sven Schmidbauer · Dresden, DE

Key dates

• Filing date: Jun 28, 2001
• Grant date: Aug 5, 2003
• Expiry date: Jun 28, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A process for fabricating an interconnect for contact holes includes forming contact holes in an insulation layer leading to a first interconnect layer, cleaning the hole surface, forming a barrier layer on the hole surface, forming an AlGeCu-containing second interconnect layer on the insulation surface by a low-temperature PVD process to fill up the contact holes, forming and patterning a mask layer, and patterning the second interconnect layer by an anisotropic etching process using the mask layer. Due to the relatively small grain sizes and precipitations that are formed in the process, the layer can be patterned directly in a subsequent patterning step, resulting in an extremely reliable and inexpensive interconnect that is easy to integrate in existing process sequences.