Technique of fabricating integrated circuits having interfaces compatible with different operating voltage conditions
US6604228B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2000 |
| Grant date | Aug 5, 2003 |
| Priority date | — |
| Expiry date | Feb 11, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018585
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A technique of fabricating an integrated circuit adaptable for use in various operating voltage environments. The same integrated circuit design may be used in different operating modes depending on the particular option selected. For example, there may be three options (710, 715, 720). The various options of the integrated circuit formed on the same integrated circuit. During the fabrication of the integrated circuit, the desired option is selected. This may be accomplished, for example, by selecting the appropriate metal masks (725). Other techniques include, to name a few, using programmable links, programmable fuses, programmable cells, and many others. The technique of the present invention reduces the costs of integrated circuits. The same design may be used for a variety of purposes and in a variety of voltage environments without needing to develop and design a specific integrated circuit for each voltage condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.