Calibration technique for delay locked loop leakage current
US6614287B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2002 |
| Grant date | Sep 2, 2003 |
| Priority date | — |
| Expiry date | Aug 13, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0816
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for post-fabrication calibration and adjustment of a delay locked loop leakage current is provided. The calibration and adjustment system includes an adjustment circuit that adjusts a leakage current offset circuit to compensate for the leakage current of a capacitor. The capacitor connects to a control voltage of the delay locked loop. Such control of the leakage current in the delay locked loop allows a designer to achieve a desired delay locked loop operating characteristic after the delay locked loop has been fabricated. A representative value of the amount of adjustment desired in the leakage current may be stored and subsequently read to adjust the delay locked loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.