Sense amplifiers having gain control circuits therein that inhibit signal oscillations
US6617885B2 · kind B2 · utility
25Cited by
14References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2001 |
| Grant date | Sep 9, 2003 |
| Priority date | — |
| Expiry date | Jul 27, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Integrated circuit memory devices according to the present invention include a sense amplifier having a pair of differential input signal lines, a pair of differential output signal lines, and a current amplifier. The current amplifier has an input stage electrically coupled to the pair of differential input signal lines and an output stage electrically coupled to the pair of differential output signal lines. The input stage and/or the output stage are responsive to a first control signal that reduces a gain of the current amplifier when the first control signal is asserted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.