Electrostatic discharge cell of integrated circuit
US6618230B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2001 |
| Grant date | Sep 9, 2003 |
| Priority date | — |
| Expiry date | Jul 23, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
Abstract
The present invention provides an IC ESD cell, which is applicable to multiple-power-input and mixed-voltage ICs and capable of maintaining power sequence independence of each power source. The ESD cell of the present invention comprises a voltage selector circuit, which connects two separate power sources to select the one having a higher potential as the output voltage. An NMOS is used to connect the two separate power sources. An RC circuit is connected to an output of the voltage selector circuit to distinguish ESD event from normal power source. Therefore, the channel of the NMOS will be conducted to let the ESD current be led out via a designed path, hence preventing internal circuits of an IC from damage and accomplishing the object of whole chip protection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.