Clustered processors in an emulation engine
US6618698B1 · kind B1 · utility
76Cited by
84References
13Claims
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Key dates
| Filing date | Aug 12, 1999 |
| Grant date | Sep 9, 2003 |
| Priority date | — |
| Expiry date | Aug 12, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Clusters of processors are interconnected as an emulation engine such that processors share input and data stacks, and the setup and storing of results are done in parallel, but the output of one evaluation unit is connected to the input of the next evaluation unit. A set of ‘cascade’ connections provides access to the intermediate values. By tapping intermediate values from one processor, and feeding them to the next, a significant emulation speedup is achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.