Patent · US Expired

System and method for finding and validating the most recent advance load for a given checkload

US6618803B1 · kind B1 · utility

10Cited by
2References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 21, 2000
Grant dateSep 9, 2003
Priority date
Expiry dateFeb 21, 2020

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/3842
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The present invention discloses a system and method for simultaneously identifying a most recent advanced load instruction employing a particular register and determining whether the instruction conflicts with a store instruction thereby requiring a recovery operation. Fully associative tables are advantageously employed for identifying the most recent load instruction, for comparing store instruction address information with addresses employed in advanced load instructions, and for logging a validity status associated with a register number. Parallel operation of load vs. check register numbers and load instruction and store instruction memory addresses conserves time and preferably enables a hit/miss determination for a particular check instruction to be completed in single machine cycle.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.