MEMS device integrated chip package, and method of making same
US6621137B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2000 |
| Grant date | Sep 16, 2003 |
| Priority date | — |
| Expiry date | Aug 29, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/24248
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a chip package that includes a semiconductor device and at least one micro electromechanical structure (MEMS) such that the semiconductor device and the MEMS form an integrated package. One embodiment of the present invention includes a semiconductor device, a first MEMS device disposed in a conveyance such as a film, and a second MEMS device disposed upon the semiconductor device through a via in the conveyance. The present invention also relates to a process of forming a chip package that includes providing a conveyance such as a tape automated bonding (TAB) structure that may bold at least one MEMS device. The method is further carried out by disposing the conveyance over the active surface of the device in a manner that causes the at least one MEMS to communicate electrically to the active surface. Where appropriate, a sealing structure such as a solder ring may be used to protect the MEMS.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.