Analog-to-digital converter circuit
US6621431B2 · kind B2 · utility
16Cited by
9References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2002 |
| Grant date | Sep 16, 2003 |
| Priority date | — |
| Expiry date | Aug 12, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/368
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter circuit including an analog-to-digital converter and calibrating circuit, preferably in the form of a digital logic, for the auto-calibration of the analog-to-digital converter. This configuration produces a very high quality analog-to-digital converter with a very low surface area requirement. The calibrating circuit corrects any errors of the analog-to-digital converter outside or inside of the analog-to-digital converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.