Radiation tolerant flip-flop
US6624677B1 · kind B1 · utility
19Cited by
10References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 8, 2002 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | Jul 8, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0375
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A flip-flop circuit comprising: a master latch circuit; a slave latch circuit coupled to the master latch circuit; and a correction circuit for increasing an amount of charge that can be absorbed by the master latch circuit in response to a soft-error event when the slave latch circuit is in a transparent phase and when both the master and slave latch circuits are storing the same data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.