ATD generation in a synchronous memory
US6625706B2 · kind B2 · utility
2Cited by
9References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2001 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | Mar 21, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of synchronizing the start of sequential read cycles when reading data in a memory in a synchronous mode with sequential access uses the increment pulses as synchronization signals for the address counters of the memory cell array. Following each increment pulse, a dummy ATD pulse is generated. The dummy ATD pulse is undistinguishable from an ATD pulse generated upon detection of a switching of external address lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.