Semiconductor integrated circuit device and method of manufacturing the same
US6627497B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2002 |
| Grant date | Sep 30, 2003 |
| Priority date | — |
| Expiry date | Jun 5, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/684
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit device including a memory cell comprising a memory cell selecting MISFET Qs formed on the main surface of a semiconductor substrate 1 and an information storage capacitor C that is connected in series to said memory cell selecting MISFET Qs, and that have a lower electrode 54, a capacitor insulator 58 and an upper electrode 59, wherein the lower electrode 54 is made of a conductive material containing ruthenium dioxide (RuO2) as principle ingredient and the capacitor insulator 58 is made of crystalline tantalum pentoxide. Thus, the capacitance required for the memory cells of a 256 Mbits DRAM or those of a DRAM of a later generation can be secured.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.