Method and apparatus for wafer-level burn-in
US6627917B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2000 |
| Grant date | Sep 30, 2003 |
| Priority date | — |
| Expiry date | Apr 25, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/316
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Methods and apparatus for burn-in of integrated circuit (IC) dies at the wafer level. In one embodiment, a wafer is fabricated having an array of dies formed thereon wherein the dies are separated by scribe areas. Surrounding each die is one or more ring conductors which are electrically coupled to various circuits on the die via die bond pads. The wafer further includes a series of conductive pads located in an inactive region of the wafer. Electrically connecting the conductive pads to the ring conductors is a series of redundant scribe conductors. During burn-in, a burn-in indicating apparatus located on each die monitors burn-in parameters such as elapsed burn-in time. The indicating apparatus further records the elapsed burn-in time (or other parameter). The indicating apparatus may be subsequently interrogated to verify the burn-in time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.