Method and apparatus for delaying ABIST start
US6629280B1 · kind B1 · utility
2Cited by
15References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2000 |
| Grant date | Sep 30, 2003 |
| Priority date | — |
| Expiry date | Jul 24, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An exemplary embodiment of the invention is a method and apparatus for delaying the start of an array built-in self-test (ABIST) until after the ABIST memory arrays have been started. The length of the delay is determined by the value in a programmable delay located on the integrated circuit. The initiation of the ABIST test is delayed by the time specified in the programmable delay.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.