Method for manufacturing semiconductor device
US6630389B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2002 |
| Grant date | Oct 7, 2003 |
| Priority date | — |
| Expiry date | Jan 30, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a trench-gate type power MOSFET in which a gate electrode is formed on a gate oxide layer formed on a surface of a wall defining a trench, the trench is annealed by heating, for example, at the temperature between 1050° C. and 1150° C. in a hydrogen atmosphere before the gate oxide layer is formed. The crystal defects generated in a crystal adjacent to the trench are cured by the hydrogen annealing without enlarging the trench horizontal width, so that a trench having a high aspect ratio is provided while leak current at a PN junction is prevented. In addition, the breakdown voltage of the gate oxide layer is prevented from being lowered.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.