Self-aligned void filling for mushroomed plating
US6631546B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2000 |
| Grant date | Oct 14, 2003 |
| Priority date | — |
| Expiry date | Feb 1, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49156
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing includes 2 mushroom plating process starts with an overplated component which includes an enlarged mushroom head having outer portions which overhang a resist layer. The next step in the first process embodiment is a heating step in which the resist layer is hard baked. Thereafter, using a dry etch process, such as a reactive ion etch (RIE) process, the hard baked resist layer is removed in all areas except beneath the overhang of the mushroom head. The area beneath the overhang thereby remains filled with hard baked resist. Thereafter, the device is ultimately encapsulated such that no voids and/or redeposition problems exist under the overhang due to the presence of the hard baked resist. In an alternative process embodiment of the present invention the dry etch process is conducted first upon the resist layer, such that the resist layer is removed in all areas except under the overhang. Thereafter, the device is baked, such that hard baked resist remains beneath the overhang. Ultimately, the device is encapsulated and no voids or redeposition problems exist beneath the overhang due to the presence of the hard baked resist.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.