Multi-phase clock generation and synchronization
US6633190B1 · kind B1 · utility
21Cited by
12References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2002 |
| Grant date | Oct 14, 2003 |
| Priority date | — |
| Expiry date | Apr 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for controlling a local clock includes receiving a reference clock and generating a phase-shifted version of the reference clock. The two clocks are synchronized using a closed-loop method that produces a control signal. The control signal is smoothed during the closed-loop method and the smoothed signal is then used, instead of the control signal, in generating the phase-shifted clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.