Method and input circuit for evaluating a data signal at an input of a memory component
US6636097B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2002 |
| Grant date | Oct 21, 2003 |
| Priority date | — |
| Expiry date | Jul 1, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/125
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method and to an input circuit for evaluating a data item in a data signal at an input of a memory component. The data signal is integrated between a start time and an end time that are specified by a control signal. An integration period between the start time and the end time depends on the frequency of the data signal. The data item is assigned a logic data value based on the result of the integration. The input circuit has a comparator device, an integration device and a switching device. The data signal is first integrated in order to obtain an integration value. The comparator device compares the integration value with a prescribed threshold value. A logic data value is assigned to the data item based on the result of the comparison.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.