Phase locked loop system
US6636727B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2001 |
| Grant date | Oct 21, 2003 |
| Priority date | — |
| Expiry date | Aug 22, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/426
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A phase locked loop system for tuning the reception frequency of a receiver for digitally modulated received signals and analog-modulated received signals has at least one voltage controlled oscillator for producing an oscillator signal for a reception frequency tuning. A first frequency divider is provided for dividing the frequency of the oscillator signal to a nominal comparison frequency as a function of a receiving channel selection signal. A second frequency divider is provided for dividing a reference frequency as a function of a reception mode switching signal. A phase comparison circuit is provided for comparing the signals supplied by the frequency dividers in order to produce a tuning voltage for the voltage controlled oscillator wherein the gain of the phase comparison circuit is adjustable in order to optimize the phase noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.