Method for producing multi-layer circuits
US6638690B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2001 |
| Grant date | Oct 28, 2003 |
| Priority date | — |
| Expiry date | Mar 16, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1572
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method for producing sequentially built-up printed circuit boards having a disparate number of conduction planes on both sides of the laminate core, which method comprises the following method steps:(A) coating both sides of a printed circuit board having conductor structures on only one side with a dielectric comprising a photopolymer or a thermally curable polymer;(B) structuring the plating holes (vias) on the side having the conductor structures by exposing the dielectric comprising a photopolymer to light and then developing with a solvent or by laser-drilling the plating holes (vias) into the dielectric comprising a thermally cured polymer;(C) depositing a copper layer on both sides of the board so obtained;(D) forming conductor structures on the front and completely etching away on the rear, if further asymmetric build-up is to be carried out, or on both sides of the printed circuit board if there is to be no further build-up or if further build-up is to be carried out symmetrically, by means of selective etching with the aid of resists;(E) repetition of process steps (A) to (D) if further asymmetric build-up is to be carried out or (A) and subsequ…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.