Process for the fabrication of integrated devices with reduction of damage from plasma
US6638833B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2001 |
| Grant date | Oct 28, 2003 |
| Priority date | — |
| Expiry date | Mar 9, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/942
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The process for the fabrication of an electronic device has the steps of forming a layer to be etched on top of a substrate in a wafer of semiconductor material; depositing a masking layer; and carrying out a plasma etch to define the geometry of the layer to be etched. The masking layer is made so as to be conductive, at least during one part of the etching step; in this way, the electrons implanted on the top part of the masking layer during plasma etching can recombine with the positive charges which have reached the layer to be etched. The recombination of the charges makes it possible to prevent damage from plasma resulting from the formation of parasitic electric currents which are detrimental to the electronic device itself.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.