Fabrication processes for semiconductor non-volatile memory device
US6642108B2 · kind B2 · utility
2Cited by
10References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2002 |
| Grant date | Nov 4, 2003 |
| Priority date | — |
| Expiry date | Oct 18, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A non-volatile memory includes a floating gate extending in a substrate between source and drain regions. A channel region may be confined by two insulating layers. The invention is particularly applicable to EPROM, EEPROM, Flash and single-electron memories using CMOS technology.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.