Semiconductor device and method of manufacturing the same
US6642599B1 · kind B1 · utility
25Cited by
7References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 1996 |
| Grant date | Nov 4, 2003 |
| Priority date | — |
| Expiry date | Aug 13, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A high resistance n-type base layer is formed on a silicon substrate with an insulating layer made of a silicon oxide film therebetween. In the high resistance n-type base layer a p-ch MOS transistor is formed. The p-ch MOS transistor is electrically isolated from another element by trench isolation formed of a trench. A p+ source layer in the p-ch MOS transistor surrounds a periphery of a p+ drain layer and has, for example, an elliptical planar configuration. A semiconductor device thus formed has a high drive capacity and is suitable to high integration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.