Processing requests to efficiently access a limited bandwidth storage area
US6643747B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2000 |
| Grant date | Nov 4, 2003 |
| Priority date | — |
| Expiry date | May 29, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0857
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A request received from a requester to access a processor cache or register file or the like is buffered, by storing requestor identification, request type, address, and a status of the request. This buffered request may be forwarded to the cache if it has the highest priority among a number of buffered requests that also wish to access the cache. The priority is a function of at least the requestor identification, the requester type, and the status of the request. For buffered requests which include a read, the buffered request is deleted after, not before, receiving an indication that the requestor has received the data read from the cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.