Register pipe for multi-processing engine environment
US6643763B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2000 |
| Grant date | Nov 4, 2003 |
| Priority date | — |
| Expiry date | Feb 28, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method, system and program storage device are provided for implementing a register pipe between processing engines of a multiprocessor computing system. A register pipe includes at least one first register of a first processing engine and at least one second register of a second processing engine. Data is transferred between the first processing engine and the second processing engine through the register pipe without passing through memory. In one embodiment, general purpose registers within the first processing engine and within the second processing engine are employed to implement the register pipe. A control mechanism is provided within each processing engine to dynamically enable or disable the register pipe coupling any two processing engines of the multiprocessor computer system. A technique for broadcasting to multiple register pipes and for implementing barrier synchronization using a register pipe addressed to a processing engine itself are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.