Integrated circuits carrying intellectual property cores and test ports
US6643810B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 25, 2002 |
| Grant date | Nov 4, 2003 |
| Priority date | — |
| Expiry date | Oct 25, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318583
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit (100) includes functional input and output signal leads (101,111), input and output circuits (102,112) connected to the functional input and output signal leads, core circuitry (120, 122, 124), and interconnect wires and circuits (103) connecting the input and output circuits and the core circuitry. The integrated circuit further includes an addressable test port (105, 115, 135) for each core circuitry. Each test port is connected to its respective core circuitry and to the interconnect wires and circuits. External test signal leads (106) connected to each test port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.