Method of forming a semiconductor wafer having a crystalline layer thereon containing silicon, germanium and carbon
US6645836B2 · kind B2 · utility
17Cited by
1References
10Claims
0Family size
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Key dates
| Filing date | Nov 21, 2001 |
| Grant date | Nov 11, 2003 |
| Priority date | — |
| Expiry date | Feb 22, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/751
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A Si substrate 1 with a SiGeC crystal layer 8 deposited thereon is annealed to form an annealed SiGeC crystal layer 10 on the Si substrate 1. The annealed SiGeC crystal layer includes a matrix SiGeC crystal layer 7, which is lattice-relieved and hardly has dislocations, and Sic microcrystals 6 dispersed in the matrix SiGeC crystal layer 7. A Si crystal layer is then deposited on the annealed SiGeC crystal layer 10, to form a strained Si crystal layer 4 hardly having dislocations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.