Double-side polishing process with reduced scratch rate and device for carrying out the process

US6645862B2 · kind B2 · utility

Assignee

• Wacker Siltronic Gesellschaft Fur Halbleitermaterialien AG · DE

Inventors

• Guido Wenski · Burghausen, DE
• Johann Glas · Burghausen, DE
• Thomas Altmann · Burghausen, DE
• Gerhard Heier · Burghausen, DE

Key dates

• Filing date: Nov 20, 2001
• Grant date: Nov 11, 2003
• Expiry date: Nov 20, 2021

Classification

• Technology area (CPC B): Performing Operations; Transporting
• CPC primary: B24B37/08
• WIPO field: Machine tools
• WIPO sector: Mechanical engineering

Abstract

A process for producing semiconductor wafers by double-sided polishing between two rotating, upper and lower polishing plates, which are covered with polishing cloth, while an alkaline polishing abrasive with colloidal solid fractions is being supplied, the semiconductor wafers being guided by carriers which have circumferential gear teeth and are set in rotation by complementary outer gear teeth and inner gear teeth of the polishing machine, which is distinguished by the following process steps:(a) at least one of the two sets of gear teeth of the polishing machine is at least from time to time sprayed with a liquid which substantially comprises water,(b) the alkaline polishing abrasive is fed continuously to the semiconductor wafers in a closed supply device. There is also a device which is suitable for carrying out the process.