Semiconductor memory device
US6647478B2 · kind B2 · utility
2Cited by
13References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2002 |
| Grant date | Nov 11, 2003 |
| Priority date | — |
| Expiry date | Jun 20, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/229
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device. The device includes a bit line, a memory cell coupled to the bit line and a word line coupled to the memory cell. A first time between the receiving of a read command for a read operation in order to read data from the memory cell and the beginning of the read operation is different from a second time between the receiving of a write command for a write operation in order to write data to the memory cell and the beginning of the write operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.