Methods of fabricating integrated circuit devices having spin on glass (SOG) insulating layers and integrated circuit devices fabricated thereby
US6649503B2 · kind B2 · utility
11Cited by
4References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2001 |
| Grant date | Nov 18, 2003 |
| Priority date | — |
| Expiry date | Dec 10, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02282
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods are provided for forming integrated circuit devices. A spin on glass (SOG) insulating layer is formed on an integrated circuit substrate. The SOG insulating layer includes sidewalls that define contact holes therein and spacers are formed on the sidewalls of the SOG insulating layer. Integrated circuit devices are also provided. The integrated circuit devices include an integrated circuit substrate, a spin on glass (SOG) insulating layer on the integrated circuit substrate. The SOG insulating layer includes sidewalls that define contact holes therein and spacers are provided on sidewalls of the SOG insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.