Graphics system and method for processing multiple independent execution threads
US6650330B2 · kind B2 · utility
55Cited by
17References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2002 |
| Grant date | Nov 18, 2003 |
| Priority date | — |
| Expiry date | Jun 21, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, apparatus and article of manufacture are provided for sequencing graphics processing in a transform or lighting operation. A plurality of mode bits are first received which are indicative of the status of a plurality of modes of process operations. A plurality of addresses are then identified in memory based on the mode bits. Such addresses are then accessed in the memory for retrieving code segments which each are adapted to carry out the process operations in accordance with the status of the modes. The code segments are subsequently executed within a transform or lighting module for processing vertex data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.