Single-poly EPROM and method for forming the same
US6653183B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2002 |
| Grant date | Nov 25, 2003 |
| Priority date | — |
| Expiry date | Oct 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A single-poly EPROM and method for forming the same. The single-poly EPROM has an isolation region disposed in a substrate to define a striped active area. A deep n-well is located under the isolation region and the striped active area. A gate oxide layer is disposed on the substrate at the striped active area. A pair of striped selective gates perpendicular to the striped active area are disposed on the gate oxide layer and the isolation region. A pair of islanded floating gates are disposed on the gate oxide layer at the active area, with a gap between the pair of floating gates and the pair of selective gates. A striped p-well is disposed in the deep n-well between the pair of selective gates and below the pair of selective gates and portions of the pair of floating gates. A pair of sources are disposed on both sides of the p-well, and connected to each other through the deep n-well. A drain is disposed in the p-well between the pair of selective gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.