Method of forming bump electrodes
US6656828B1 · kind B1 · utility
61Cited by
3References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2001 |
| Grant date | Dec 2, 2003 |
| Priority date | — |
| Expiry date | Jun 22, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A CSP in which bump electrodes (2) arranged in an area on a chip (1A) and bonding pads (BP) are electrically connected to each other via Cu interconnections (6), wherein the surface of the Cu interconnection (6) is covered with a barrier layer (14) to thereby prevent diffusion of Cu from the CU interconnection (6) into a polyimide resin layer (3) by a heat treatment during the manufacturing process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.