Semiconductor device having groove isolation structure and gate oxide films with different thickness
US6657248B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 2, 1999 |
| Grant date | Dec 2, 2003 |
| Priority date | — |
| Expiry date | Nov 2, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/50
Abstract
There was a problem that sharpening of a substrate and localized increase in the thickness of a gate oxide film become more remarkable as the thickness of the gate oxide film is increased to degrade the gate withstand voltage at the surface edge of shallow groove isolation structure. In the present invention, a bird's beak is disposed at the surface edge of a shallow isolation structure GROX11 just below gate electrode POLY11 and in contact with the gate insulation film HOX1 to form the gate insulation film HOX1 previously. This can ensure normal gate withstand voltage of the MOS transistor and favorable device isolation withstand voltage and increased integration degree simultaneously.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.