Predictive, adaptive power supply for an integrated circuit under test
US6657455B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2002 |
| Grant date | Dec 2, 2003 |
| Priority date | — |
| Expiry date | Jul 25, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31905
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A main power source supplies current through path impedance to a power terminal of an integrated circuit device under test (DUT). The DUT's demand for current at the power input terminal temporarily increases following edges of a clock signal applied to the DUT during a test as transistors within the IC switch in response to the clock signal edges. To limit variation (noise) in voltage at the power input terminal, an auxiliary power supply supplies an additional current pulse to the power input terminal to meet the increased demand during each cycle of the clock signal. The magnitude of the current pulse is a function of a predicted increase in current demand during that clock cycle, and of the magnitude of an adaption signal controlled by a feedback circuit provided to limit variation in voltage developed at the DUT's power input terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.