Hardware device for executing programmable instructions based upon micro-instructions
US6658561B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2000 |
| Grant date | Dec 2, 2003 |
| Priority date | — |
| Expiry date | Apr 20, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30185
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to a hardware device for parallel processing a determined instruction of a set of programmable instructions having a same format with an operand field defining the execution steps of the instruction corresponding to the execution of micro-instructions, comprising decision blocks (12—20) being each associated with a specific instruction of the set of programmable instructions, only one decision block being selected by the determined instruction in order to define which are the specific micro-instructions to be processed for executing the determined instruction, activation blocks (22-30) respectively associated with the decision blocks for running one or several specific micro-instructions, only the activation block associated with said selected decision block being activated to run the specific micro-instructions, and a micro-instruction selection block (46) connected to each activation block for selecting the specific micro-instructions to be executed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.